Computer Organization
CS 220 (4 credits)

FALL 2008 SYLLABUS


Objectives 

Grading 

 Course Schedule 

Course policies 


Instructor: Prof. John Wright
E-mail:       wrightj@juniata.edu
Office:        Brumbaugh Academic Center, C-201
Phone:        641-3592

Office Hours are kept current on my home page. See the home page or my office door for recent changes; other office hours may be arranged by appointment.

Class meeting times:
        MWF     09:00am   Th    08:00am      BAC P223(MWF)/B-201(Th)


Textbooks:

Required:
Miller, Karen - An Assembly Language Introduction to Computer Architecture Using the Intel Pentium, Oxford University Press, 1999.
Book Web Site

Grading (dates subject to change):

15% Exam 1
15% Exam 2

15% Exam 3

10% Problem Assignments/Labs
20% Programming Projects
25% Comprehensive Final

Objectives:

Course description:  An introduction to digital computer systems including a treatment of logic and digital circuits, data representation, device characteristics and register transfer notation covered in a manner that stresses application of basic problem solving techniques to both hardware and software design. Students gain experience programming in an assembly language to reinforce these systems and design concepts.

Students will study and gain understanding in:

          · the organization of a typical computing system from the high level language, machine level, and digital logic perspectives
          · the importance of mathematical systems in hardware design
          · the high level programming language capabilities and limitations as they relate to the computer hardware
          · the various forms of data representation within a computer system

Students should develop or enhance skills in:

          · programming in an assembly language and transferring these understandings to efficiently implement various high level language and

            data structures
          · reasoning about software design in relation to hardware
          · debugging techniques ranging from low level to high level language design
 

Prerequisites: CS110/IT116

Course policies

These standard course policies are described on the web page linked above. Please read them carefully, especially on academic integrity.
 

Course Schedule:

This is a sample schedule and is subject, and very likely, to change at any time. Refer to Moodle for all assignments.

Day Topic Reading
8/25 Course Introduction  
8/27 Introduction to Computer Organization (Chapter 1) Chapter 1
8/28 Intro to Thursdays; Blackboard; Finish up History of Computers; OO vs. Structured Prog  
8/29 Computer Basics; Memory Operation;  Instruction Fetch and Execute Cycle Chapter 2
9/1 Performance; Assembly Lang. Chapter 3
9/3 Addr. Architectures; SASM Vars & Arithmetic Instructions;  
9/4 SASM Lab;  Project 0 part 1 due in class  
9/5 SASM Control Structures; SASM I/O; Sample Programs; Programming Assignments Instruction  
9/8 Follow-up on SASM lab; Number Systems & Representations Chapter 4
9/10 Numerical Transformations  
9/11 Introduction to Digital Logic; Help with Project 0  
9/12 Numerical Transformations  
9/15 Nonintegers; Normalization; Number Representation Chapter 5
9/17 Signed Magnitude, One's and Two's Complements; Project 1 assigned; Biased Representation  
9/18 Introduction to Digital Logic Cont.; Basics of Electronics; Help with Project 1  
9/19 Sign Extension; Character Representation  
9/22 Floating Point Representation  
9/24 Exam #1 (chapters 1-5)  
9/25 E-lab: Intro, Yes, Not, And  
9/26  Logical Operations, Masking, and Bit Shifting Chapter 6
9/29 Arithmetic Operations:  Addition/Subtraction  
10/1 Arithmetic Operations:  Multiplication/Division  
10/2 E-lab: Or, Nand, Nor Chapter 7.1
10/3 FLOPS; Data Structures:  Arrays  
10/6 Fall Recess - No classes  
10/8 Data Structures:  Arrays, Stacks, Queues Chapter 8
10/9 E-lab: continued  
10/10 Data Structures:  Stacks, Queues; Instruction and Efficiency  
10/13 Registers; Load/Store Architectures Chapter 9
10/15 Addressing Modes; Pentium Architecture: Registers  
10/16 E-lab: continued  
10/17 Pentium Memory Model; Addressing Modes; Instruction Set Chapter 10
10/20 Pentium Instruction Set; Procedure Calls  
10/22 Pentium Code Lab  
10/23 History of Transistors?  
10/24 Procedure Calls Chapter 11
10/27 Activation Records; Parameter Passing  
10/29 Register Saving; Pentium Procedure Calls  
10/30 Lab/Review  
10/31 Assemblers:  What assemblers do Chapter 12
11/3 Exam #2 (chapters 6-11)  
11/5 Machine Code Format and Code Generation  
11/6 Lab  
11/7 Link and Load  
11/10 Machine Code Exercise  
11/12 Typical I/O devices;Processor-I/O Interface; DMA Chapter 13
11/13 Lab  
11/14 Processor-I/O Interface  
11/17 Processor-I/O Interface; DMA; Interrupts and Exception Handling Chapter 14
11/19 Pentium Exception Handling; Advanced Issues in Exception Handling  
11/20 Lab  
11/21 Review; Features for Architectural Performance  
11/24 Exam #3 (chapters 12-14)  
11/26 Thanksgiving Recess - No Classes  
11/27 Thanksgiving Recess - No Classes  
11/28 Thanksgiving Recess - No Classes  
12/1 Features for Architectural Performance; Chapter 15
12/3 Architecture in Perspective (Instruction set; CISC vs. RISC; Single-chip processors) Chapter 16
12/4 Put the Kingdom back together again and got it working  
12/5 Computer Organization Treasure Hunt  
12/8 Review  
12/? Comprehensive Final